Northwestern’s MSCompE propels engineers into silicon-level innovation—from neuromorphic accelerators to quantum-resistant cryptographic cores. Coursework pairs RFIC design, parallel architecture, and secure boot chains with electives in 6G communications and biomedical SOCs. Students tape out chips via Google Open MPW, validate firmware in RISC-V labs, and publish at DAC or Hot Chips. Entrepreneurial tracks link teams with venture mentors and IP clinics to spin hardware startups.
Design a PUF-anchored root-of-trust for ultra-low-power medical implants
Implement spiking-neural-network accelerators on FPGA and benchmark energy savings
Develop a real-time LiDAR point-cloud compression engine for autonomous drones
Prototype an open-source LoRa-based mesh SoC for disaster communication
Evaluate side-channel leakage in lattice-based crypto cores with EM probes
Create a chiplet-based heterogeneous compute module for modular servers
Model thermal-via optimization in 3-D TSV stacked memories
Build a RISCV-vector ISA extension tailored for genomic alignment workloads
Develop a post-quantum VPN gateway on custom NIC FPGA cards
Fabricate graphene NEMS sensors integrated with on-chip ADCs for gas detection
Prototype dynamic voltage/frequency scaling algorithms driven by ML workload prediction
Design mixed-signal circuits harvesting RF energy for smart-dust motes
Audit firmware update chains in automotive ECUs and propose secure OTA protocols
Benchmark open-source EDA flows for 14-nm FinFET standard-cell libraries
Write a commercialization plan for secure edge-AI ASICs in agricultural robotics
Invent secure, intelligent hardware solutions with Northwestern CompE.
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