USC EE majors jump from Fab to Fabless. Students design SiC MOSFET gate drivers in Cadence Virtuoso, prototype mmWave phased arrays for 6 G physical layer (6G PHY) tests, and tape-out spiking-neural-network (SNN) accelerators on GlobalFoundries MPW runs. A Clean-Room (CR) nanofab module teaches photolithography & ALD, while a Cyber-Physical Systems (CPS) lab hacks Software-Defined Radios (SDR) for spectrum sensing. Graduates grasp both Maxwell and MLOps.
Gallium-nitride (GaN) inverter for solar micro-grid
Beamforming algorithm on 64-element antenna testbed
Edge AI SNN accelerator benchmarking 1 TOPS/W
RF energy-harvesting rectenna array for IoT nodes
Time-interleaved ADC design hitting 20 GS/s
Quantum-dot single-photon detector characterization
LoRaWAN network mapper using drone SDR sweeps
FPGA-based PUF for hardware root-of-trust
AI-aided PCB auto-routing tool with reinforcement learning
SiC MOSFET thermal model using COMSOL Multiphysics
Digital predistortion (DPD) for Doherty PA linearization
Wireless power transfer coil pair optimizing Q-factor
Policy memo on Open-RAN security for 6 G
AR overlay for real-time Smith chart tuning in labs
On-chip reservoir computing for gesture recognition
Design electrons’ pathways—from nano-scale gates to global 6 G networks.
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